In general, a dynamic random access memory (DRAM) device includes memory cells arranged in rows and columns in an array, with the rows extending along an x-direction and the columns extending along a y-direction. Conductive word lines, or pages, extend across the array of memory cells along the x-direction and conductive bit lines extend across the array of memory cells along the y-direction. A memory cell is located at each cross point of a word line and a bit line. Memory cells are accessed using a row address and a column address.
DRAM memory cells are essentially made up of a capacitor, and data are stored in the DRAM memory cells in the form of electric charges. Data retention time is therefore limited, since over time a stored charge gradually leaks off. To prevent data corruption, the charge must be periodically refreshed. The time within which a refresh must be performed to prevent such data corruption is commonly referred to as the refresh interval. To refresh data in a memory array, the array is typically placed in a read mode to obtain the present data stored in a row of memory cells, or page. Subsequently, these data are used as new input data that is re-written to the page, thus maintaining the stored data.
Extending the refresh interval (reducing the refresh frequency) consumes less power, which of course is desirable in low power applications. However, if the refresh interval is extended beyond the data retention time, errors can occur resulting in reduced data quality. On the other hand, setting a short refresh interval helps maximize quality, but can result in excess power consumption.
Known DRAM devices typically have a fixed refresh interval setting for all pages when in self refresh. Refreshing all-pages in a DRAM with the same refresh interval is not optimized because not all pages exhibit the same retention time. Known methods of adjusting refresh intervals based on retention test results are fail to adjust to possible changes in retention behavior of the DRAM and retention requirements in the field. As a consequence, the trade-off between extended refresh interval (reduced power consumption) and reduced failure rate (quality) in the system is not optimized.